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What is the design objective of PRA100 Risc-V FPGA Board system ?

The main purpose of this system design is to complete FPGA learning, development and experiment with Xilin-Vivado.  The main device uses the Xilinx-XC7A100T-2FGG676I and is currently the latest generation of FPGA devices from Xilinx.

The main learning and development projects can be completed as follows:

  1. Basic FPGA design training
  2. Construction and training of the SOPC (Microblaze) system
  3. IC design and verification, the system provides hardware design, simulation and verification of RISC-V CPU
  4. Development and application based on RISC-V
  5. The system is specifically optimized for hardware design for RISC-V system applications